ECC, which is an extra data byte lane used for correcting minor errors and detecting major errors for better reliability. In addition to bandwidth and capacity variants, DDR3 modules can optionally implement: The JEDEC standards for DDR3 memory are listed below: Standard name Like DDR and DDR2 before them, DDR3 DIMMs are identified by their peak transfer capacity (often called bandwidth). The DDR3U standard is 1.25V and has the label ’’PC3U’’ for its modules. The DDR3L standard is 1.35V and has the label ’’PC3L’’ for its modules. JEDEC introduced two low-voltage standards. Lower voltage DDR3 modules, known as DDR3L and DDR3U, are also becoming increasingly popular. Fully buffered modules cannot be used with motherboards that are made for registered modules, and the different notch position physically prevents their insertion. Be fully buffered modules, which are designated by F or FB and do not have the same notch position as other classes. unbuffered RAM) may be identified by an additional U in the designation. Typically modules with this designation are actually ECC Registered, but the 'E' of 'ECC' is not always shown. Those modules are identified by an additional R in their designation, e.g.
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